tc7w74f/fu/fk 2009-09-30 1 toshiba cmos digital integrat ed ci rcuit silicon monolithic tc7w74f,tc7w74fu,tc7w74fk d-type flip flop with preset and clear the tc7w74 is a high speed c 2 mos d flip flop fabricated with silicon gate c 2 mos technology. it achieves the high speed op eration similar to equivalent lsttl while maintaining the c 2 mos low power dissipation. the signal level applied to the d input is transferred to q output during the positive going transition of the clock pulse clear and preset are independ ent of the clock and are accomplished by setting the appropriate input to an ?l? level input is equipped with protection circuits against static discharge or transient excess voltage. features ? high speed: f max = 77 mhz (typ.) at v cc = 5 v ? low power dissipation: i cc = 2 a (max) at ta = 25c ? high noise immunity: v nih = v nil = 28% v cc (min) ? output drive capability: 10 lsttl loads ? symmetrical output impedance: |i oh | = i ol = 4 ma (min) ? balanced propagation delays: t plh ? t phl ? wide operating voltage range: v cc (opr) = 2 to 6 v marking tc7w74f tc7w74fu tc7w74fk weight sop8-p-1.27: 0.05 g (typ.) ssop8-p-0.65: 0.02 g (typ.) ssop8-p-0.50a: 0.01 g (typ.) lot no. part no. 7 w 7 4 f tc7w74f tc7w74fu lot no. part no. 7 w 7 4 tc7w74fk part no. w 7 4
tc7w74f/fu/fk 2009-09-30 2 absolute maximum ratings (ta = 25c) characteristics symbol rating unit supply voltage range v cc ? 0.5 to 7 v dc input voltage v in ?0.5 to v cc + 0.5 v dc output voltage v out ?0.5 to v cc + 0.5 v input diode current i ik 20 ma output diode current i ok 20 ma dc output current i out 25 ma dc v cc /ground current i cc 25 ma 300 (fm8, sm8) power dissipation p d 200 (us8) mw storage temperature range t stg ? 65 to 150 c lead temperature (10 s) t l 260 c note: using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this pr oduct to decrease in the reliability significantly even if the operating conditions (i.e. operat ing temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). pin configuration (top view) logic diagram clr 6 pr 7 1 ck 2 d 4 gnd v cc 8 q 5 3 q s c d r pr ck q (7) (1) (5) clr q (2) (6) (3) d
tc7w74f/fu/fk 2009-09-30 3 truth table inputs outputs clr pr d ck q q function l h x x l h clear h l x x h l preset l l x x h h ? h h l l h ? h h h h l ? h h x qn n q no change operating ranges characteristics symbol rating unit supply voltage v cc 2 to 6 v input voltage v in 0 to v cc v output voltage v i/o 0 to v cc v operating temperature range t opr ? 40 to 85 c 0 to 1000 (v cc = 2.0 v) 0 to 500 (v cc = 4.5 v) input rise and fall time t r , t f 0 to 400 (v cc = 6.0 v) ns electrical characteristics dc electrical characteristics ta = 25c ta = ? 40 to 85c characteristics symbol test condition v cc (v) min typ. max min max unit 2.0 1.5 ? ? 1.5 ? 4.5 3.15 ? ? 3.15 ? high level v ih ? 6.0 4.2 ? ? 4.2 ? 2.0 ? ? 0.5 ? 0.5 4.5 ? ? 1.35 ? 1.35 input voltage low level v il ? 6.0 ? ? 1.8 ? 1.8 v 2.0 1.9 2.0 ? 1.9 ? 4.5 4.4 4.5 ? 4.4 ? i oh = ? 20 a 6.0 5.9 6.0 ? 5.9 ? i oh = ? 4 ma 4.5 4.18 4.31 ? 4.13 ? high level v oh v in = v ih or v il i oh = ? 5.2 ma 6.0 5.68 5.80 ? 5.63 ? 2.0 ? 0 0.1 ? 0.1 4.5 ? 0 0.1 ? 0.1 i ol = 20 a 6.0 ? 0 0.1 ? 0.1 i ol = 4 ma 4.5 ? 0.17 0.26 ? 0.33 output voltage low level v ol v in = v ih or v il i ol = 5.2 ma 6.0 ? 0.18 0.26 ? 0.33 v input leakage current i in v in = v cc or gnd 6.0 ? ? 0.1 ? 1.0 a quiescent supply current i cc v in = v cc or gnd 6.0 ? ? 2.0 ? 20.0 a
tc7w74f/fu/fk 2009-09-30 4 timing requirements (input t r = t f = 6 ns) ta = 25c ta = ? 40 to 85c characteristics symbol test condition v cc (v) typ. limit limit unit 2.0 ? 75 95 4.5 ? 15 19 minimum pulse width (clock) t w (l) t w (h) ? 6.0 ? 13 16 ns 2.0 ? 75 95 4.5 ? 15 19 minimum pulse width ( clr , pr ) t w (l) ? 6.0 ? 13 16 ns 2.0 ? 75 95 4.5 ? 15 19 minimum set-up time t s ? 6.0 ? 13 16 ns 2.0 ? 0 0 4.5 ? 0 0 minimum hold time t h ? 6.0 ? 0 0 ns 2.0 ? 25 30 4.5 ? 5 6 minimum removal time ( clr , pr ) t rem ? 6.0 ? 4 5 ns 2.0 ? 6 5 4.5 ? 31 25 clock frequency f ? 6.0 ? 36 29 mhz ac characteristics (c l = 15 pf, v cc = 5 v, ta = 25c) characteristics symbol test condition min typ. max unit output transition time t tlh t thl ? ? 6 12 ns propagation delay time (clock-q, q) t plh t phl ? ? 13 26 ns propagation delay time ( clr , pr -q, q) t plh t phl ? ? 14 26 ns maximum clock frequency f max ? 36 77 ? mhz
tc7w74f/fu/fk 2009-09-30 5 ac electrical characteristics (c l = 50 pf, input t r = t f = 6 ns) ta = 25c ta = ? 40 to 85c characteristics symbol test condition v cc (v) min typ. max min max unit 2.0 ? 30 75 ? 95 4.5 ? 8 15 ? 19 output transition time t tlh t thl ? 6.0 ? 7 13 ? 16 ns 2.0 ? 48 150 ? 190 4.5 ? 16 30 ? 38 propagation delay time (clock-q, q) t plh t phl ? 6.0 ? 13 26 ? 32 ns 2.0 ? 51 150 ? 190 4.5 ? 17 30 ? 38 propagation delay time ( clr , pr -q, q) t plh t phl ? 6.0 ? 15 26 ? 32 ns 2.0 6 21 ? 5 ? 4.5 31 63 ? 25 ? maximum clock frequency f max ? 6.0 36 67 ? 29 ? mhz input capacitance c in ? ? 5 10 ? 10 pf power dissipation capacitance c pd (note) ? 34 ? ? ? pf note: c pd is defined as the value of internal equivalent capa citance which is calculated from the operating current consumption without load. average operating current can be obtained by the equation: i cc (opr) = c pd ? v cc ? f in + i cc system diagram ck d q q clr pr
tc7w74f/fu/fk 2009-09-30 6 package dimensions weight: 0.05 g (typ.)
tc7w74f/fu/fk 2009-09-30 7 package dimensions weight: 0.02 g (typ.)
tc7w74f/fu/fk 2009-09-30 8 package dimensions weight: 0.01 g (typ.)
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